On Complete Deterministic Testing Logic in BIST for High Availability Systems

摘要

The test patterns used in Built in self test has always been of important significance. Several works have employed pseudo . random, weighted random and mixed-mode patterns for testing. But in all these works complete deterministic testing logic is wrongly assumed to be too expensive. Plus no concern has been given to power dissipation due to testing. This paper shows power consumption in complete deterministic testing logic is lesser compared to mixed-mode testing. Also the test application time is least for complete deterministic testing, making it an ideal choice for high-availability systems.