CMOS PIEZORESISTIVE STRESS SENSORS ON (111) SILICON

摘要

An extensive experimental study of the room temperature piezoresistive characteristics of n- and p-type devices on (111) silicon including resistors, van der Pauw test structures (VDPs), field-effect transistors (FETs) and inversion layer van der Pauw structures (ILVDPs) has been made. A Test chip with these structures has been designed and fabricated using a new CMOS process for (111) siliocn. These structures have been characterized and compared with the piezoresistive coefficients of FETs on (111) silicon. The coefficients have been obtained using a combination of four-point-bending and hydrostatic experiments. These coefficients will enable to measurement of the complete stress states at a point on the surface of a die by use of six-element FET rosettes on (111) silicon. The inversion layer stress sensors including FET and ILVDP were found to possess stress sensitivities two times higher than those of diffused sensors such as standard resistors and VDPs. The stress sensitivity of VDPs and ILVDPs is approximately three times higher than that of filamentary sensors such as resistors and FETs. Overall, the ILVDP offers more than a six-fold increase in stress sensitivity compare to a standard resistor sensor.