A 60-GHz double-balanced homodyne down-converter in 65-nm CMOS process

摘要

A fully differential 60 GHz down-converter in 65-nm CMOS technology is presented. The circuit, including the buffers, draws 5 mA from a 1.2 V supply. The measured power conversion gain is 4 dB with an IF 3 dB bandwidth of 1.3 GHz. Measured IIP2 and IIP3 are 16.6 and −6 dBm respectively. The mixer will be part of a 60 GHz receiver.