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Optimizing power-accuracy trade-off in approximate adders

机译:在大致添加剂中优化功率准确性折衷

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Approximate circuit design has gained significance in recent years targeting applications like media processing where full accuracy is not required. In this paper, we propose an approximate adder in which the approximate part of the sum is obtained by finding a single optimal level that minimises the mean error distance. Therefore hardware needed for the approximate part computation can be removed, which effectively results in very low power consumption. We compare the proposed adder with various approximate adders in the literature in terms of power and accuracy metrics. The power savings of our adder is shown to be 17% to 55% more than power savings of the existing approximate adders over a significant range of accuracy values. Further, in an image addition application, this adder is shown to provide the best trade-off between PSNR and power.
机译:近年来近年来的媒体处理等媒体处理的近似电路设计具有重要应用,其中不需要完全精度。在本文中,我们提出了一种近似加法器,其中通过找到最佳电平来获得总和的近似部分,其最小化平均误差距离。因此,可以去除近似部分计算所需的硬件,从而有效地导致功耗非常低。我们将建议的加法器与各种近似加法者在文献中与功率和准确度指标进行比较。除了在大量精度值范围内的现有近似加法器的功率节省,我们的加法器的节能显示为17 %至55 %。此外,在图像加法应用中,该加法器显示为在PSNR和电源之间提供最佳权衡。

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