AN ACCURATE EXPLORATION OF TIMING AND AREA TRADE-OFFS IN ARITHMETIC OPTIMIZATION USING CARRY-SAVE-ADDERS

摘要

Carry-save adder (CSA) is one of the most widely used implementation units for arth- metic circuits. However, the existing approaches to the CSA transformation have an inherent limitation in the scope of CSA application, i.e., transforming each of opera- tion trees separately without any interaction among them, which results in a locally optimized CSA circuit. To overcome the limitation, we introduce a new concept called tree-boundary optimization techniques, based on which we propose a practically efficient algorithm for exploring timing and area trade-offs in optimizing arithmetic circuits using CSAs.