DEVELOPMENTS OF FAN-OUT WAFER LEVEL PACKAGING TECHNOLOGY FOR SYSTEM-IN-PACKAGE ON WAFER-LEVEL (WLSIP)

摘要

The fan-out WLP Technology eWLB (Embedded Wafer Level Ball Grid Array) is running in high volume production since more than three years and NANIUM is one of the main Packaging companies providing this technology for its customers. Up to now this advanced packaging technology has been used for single die products and addressing mainly consumer mobile applications. Leveraged by its advantages in performance; design flexibility; form factor and cost, this technology is being developed to better address the needs for System-in-package on wafer level (WLSiP). This paper will reveal the last developments occurred at NANIUM that enable system-in-package solutions using eWLB fan-out WLP technology (FO-WLP). One main enabler for SiP applications using eWLB is the possibility to design using multi-layer re-distribution layers (RDL) and using the finest possible line widths and spaces. During this paper we will present the results of the development of two RDL layers and on the development of finer RDL lines. When considering SiP products, where several types of active and passive devices are designed and built-in inside one unique package every single space will count for the final package form factor. We will demonstrate the results of the developments that enable to achieve minimum distances between every single device and between device edges and the edge of the package. Finally, in this paper we will show details about development work done for the integration of more than one active die on one package, as well as last results of development of 3D solutions using eWLB, that enable heterogeneous integration and PoP solutions, using 3D-PLUS wafer-stacking technology (W2W) called Wire-free Die-on-Die (WDoD).