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3D MEMS WAFER LEVEL PACKAGING EXEMPLIFIED BY RF CHARACTERIZED TSVs TGVs AND INTEGRATION OF BONDING PROCESSES

机译:3D MEMS晶圆级包装通过RF表征TSV和TGV和TGV和粘合过程的集成

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This paper presents successful manufacturing of metalized Through Silicon Vias (TSVs) and Through Glass Vias (TGVs) for RF applications. RF characterization showed low insertion losses for both TSVs and TGVs, with less than -0.04 dB per coplanar TSV at 5 GHz frequency and around -0.006 dB at 5 GHz for the TGVs. Electrical DC resistance measurement was conducted on 644 TSVs, divided on four different wafers and showed a via resistance of 20.4 mOhm. The overall TSV yield is in the high 90% range. An extensive reliability and failure analysis was conducted, focusing on understanding the failing TSVs to further improve the yield. X-ray inspection was used in order to quickly screen and identify the few defective TSVs. Also, a description of the via integration capabilities provided by Silex Microsystems is presented, including a discussion about the cost of ownership. The work has been executed within the EU consortiums EPAMO and PROMINENT.
机译:本文介绍了通过硅通孔(TSV)和通过玻璃通孔(TGV)的金属化的成功制造,用于RF应用。 RF表征显示了TSV和TGV的低插入损耗,每平方为5GHz频率,每平方度TSV小于-0.04dB,为TGV的5GHz为-0.006 dB。电直流电阻测量在644 TSV上进行,在四个不同的晶片上分开,并显示出20.4 moHm的电阻。整体TSV产量在90%的范围内。进行了广泛的可靠性和故障分析,重点是理解未能的TSV,以进一步提高产量。使用X射线检测以便快速筛选并识别少数有缺陷的TSV。此外,呈现了Silex Microsystems提供的通孔集成能力的描述,包括关于所有权成本的讨论。这项工作已在欧盟联盟的EPAMO和突出中执行。

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