Reliability of Scaled Modern Integrated Circuits In Harsh Environments

摘要

CMOS-technology is widely used in the fabrication of integrated circuits (IC) is continuously scaled to achieve higher speed and higher density and lower cost. One of the scaling parameters is the smallest line width that can be made at a certain time. Unfortunately this also imply higher current density in the conductor line of the IC which in turn imply higher wear-out and shorter life length of the IC. There are investigations showing that the life length of the IC goes from< 7 years for a line width of 90 nm and even less for a line width of 45 nm. To day 2015, volume production exist from many vendors with a line width of 20 nm. It will be shown that this picture of life length versus line width give a too pessimistic view of the reliability in harsh environments. Other failure modes are more important for the life length in harsh environments.