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LEAD-FREE AND HALOGEN FREE SOLDER FLIP CHIPS INTEGRATION ON BOARD USING SMT PROCESS

机译:无铅和无卤素焊料翻转芯片在船上一体化使用SMT工艺

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Miniaturization and the integration of a growing number of functions in portable electronic devices require an extremely high packaging density for the active and passive components. There are many ways to increase the packaging density and a few examples would be to stack them such as with Package on Package (PoP), fine pitch CSP's or solder flipchip on board. This means that the size and pitch of solder balls or pads in the electronic component packages will continue to shrink and that component stacking with so called Package on Package (PoP) and fine-pitch CSP's will continue to be heavily used. Another important factor is that, not only is the area density increasing and the drive to make portable electronics thinner also drives thinner components and thereby warpage becomes one of the key challenges. The use of fine pitch CSP and PoP component's, equal and below 0.40mm pitch, poses a number of challenges for PCB Design, SMT Assembly process and Reliability. Since the assembly methods and requirements of these are very similar to lead-free solder flipchips, this means lead-free solder flipchip on board can be implemented into high volume consumer products at minimal extra cost of process or materials such as flux underfill and last but not least the cost of printed circuit boards. First, a feasible assembly process must be achieved. The assembly process ranges all the way from screen-printing, dipping in flux or paste, reflow soldering in air or nitrogen and underfill. Many factors influence the quality of the assembly process and with the reduced pitch, the process capabilities for both assembly and PCB fabrication will be tested to its limit and beyond. The basic processes to control are screen-printing, pick & place, reflow soldering with the aid of Nitrogen and underfill and by using solder flipchip some of the challenges can actually be eliminated but there will also be some extra challenges such as known good die, wafer feeding and others. Second, the correct incoming materials such as PCB material, PCB surface finish, solder paste, dipping flux, underfill and PCB design need to be selected to ensure a high yielding, cost effective and reliable interconnects. Of course, the mechanics of the products makes a big difference as well but, it is very product dependent and many of today's products leave little room for designing the mechanics in the most reliable way due to total cost and overall look and size of the products. This paper will discuss different design & layout alternatives and assembly & material selection alternatives for using 0.18mm pitch solder flipchips instead of 0.30-0.40mm pitch CSP's and their corresponding challenges. Different flux and underfill materials are evaluated for compatibility with the lead-free solder and halogen free materials and processes. Results from assembly and reliability testing will be presented, in comparison with 0.30mm pitch CSP's on halogen free FR4 substrates with and without underfill.
机译:便携式电子设备中越来越多的功能的小型化和集成需要极高的封装密度,用于主动和无源部件。有许多方法可以增加包装密度,并且一些例子是堆叠它们,例如封装上的包装(POP),精细间距CSP或焊料闪络板上的封装。这意味着电子元件封装中的焊球或焊盘的尺寸和间距将继续收缩,并且在封装(POP)和细间距CSP上使用所谓的封装堆叠的部件将继续使用。另一个重要因素是,不仅是面积密度增加,并且使便携式电子产品稀释剂的驱动器也驱动更薄的部件,从而翘曲成为关键挑战之一。使用精细间距CSP和POP组件,等于和低于0.40mm的音高,为PCB设计,SMT组装过程和可靠性带来了许多挑战。由于这些组装方法和要求与无铅焊料拼接器非常相似,这意味着在船上的无铅焊料Flipchip可以以最小的工艺或材料的额外成本(如助焊剂底部填埋和最后但最后但是尤其是印刷电路板的成本。首先,必须实现可行的装配过程。装配过程一直从丝网印刷,浸入通量或糊状物中,在空气或氮气中回流焊接和底部填充物。许多因素会影响组装过程的质量,并且随着音调减小,组装和PCB制造的工艺能力将被测试到其极限和超越。控制的基本过程是丝网印刷,拾取,借助氮气和底部填充的回流焊接,并通过使用焊料触摸芯片实际上可以消除一些挑战,但也会有一些额外的挑战,如已知的好死,晶圆喂养和其他。其次,需要选择正确的进入材料,如PCB材料,PCB表面光洁度,焊膏,浸渍通量,底部填充和PCB设计,以确保高产,成本效益和可靠的互连。当然,产品的机制也产生了很大的差异,但是,由于总成本和整体外观和产品的整体外观和大小,它的许多产品依赖于商品依赖性,许多产品遗留空间,以最可靠的方式设计机械机械。 。本文将讨论不同的设计和布局替代品和装配和材料选择替代品,用于使用0.18mm螺距焊点壁档而不是0.30-0.40mm间距CSP及其相应的挑战。评价不同的助焊剂和底部填充材料,以与无铅焊料和无卤素材料和方法相容。随着0.30mm间距CSP在卤素免于FR4基板上,将提出组装和可靠性测试的结果,其中无底部填充。

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