Nano-silver sintered bonding was carried out at 275°C and under 3 mPa pressures, and soldering in a vacuum reflowing oven to reduce voiding. Both joints are subject to large shear stresses due to the mismatch in coefficients of thermal expansion (CTE) between the chip and the substrate. In this study, residual stresses in the chip-on-substrate assemblies were determined by measuring the bending curvatures of the bonded structures. An in-house optical setup measured the bending curvatures using a thin-film stress measurement technique. From the measured bending curvatures and the mechanical properties of the constituent materials, residual stresses were calculated. The thermo-mechanical reliabilities of both joining techniques were tested by thermal cycling. The chip assemblies were cycled between -40°C and 125°C (100 minutes of cycle time, 10 minutes of dwell time) and the changes in their bending curvatures were measured. Residual stresses were found to decrease with temperature cycling, which may be due to stress relaxation from creep or crack formation in the die-attach materials. Failure analysis of sintered nano-silver joints, eutectic Sn-3.5Ag solder (SAC305) joints and eutectic SnCu0.7Ni solder (SN100C) joints was performed by means of cross-sectioning and scanning electron microscopy (SEM) after 800 thermal cycles. For both solder materials with copper substrate, fatigue fracture started at the edge of the solder, and crack propagation across the solder joint was observed. No cracks were found at the joints between silicon and sintered nano-silver. The stress-relaxation behavior of all die-attach layers are hypothesized.
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