Lot and Wafer Sampling Plan Methodology for Outgoing DPM Control - (PPT)

摘要

In the semiconductor industry, internal or external customers often require sampling at different steps of the fabrication process to evaluate critical characteristics (critical dimensions, film thickness, etc.) of the product. Some of the evaluations are associated with product disposition for the purpose of reliability and quality control or yield improvement; For quality and reliability control purposes, statistics (the lot mean and/or wafer mean are commonly used) from samples are compared against spec limits to disposition the product; In practice, it is almost impossible to conduct 100% sampling due to resource constraints and throughput requirements. Therefore, it is important for engineers and management to understand the risk of not catching maverick material (lots or wafers) for a given sampling/disposition plan and choose a proper sampling/disposition plan with an acceptable risk level.