首页> 外文会议>ASME InterPack Conference >HIGH ACCURACY THERMAL ANALYSIS METHODOLOGY FOR SEMICONDUCTOR JUNCTION TEMPERATURES CONSIDERING LINE PATTERNS OF MULTILAYERED CIRCUIT BOARDS
【24h】

HIGH ACCURACY THERMAL ANALYSIS METHODOLOGY FOR SEMICONDUCTOR JUNCTION TEMPERATURES CONSIDERING LINE PATTERNS OF MULTILAYERED CIRCUIT BOARDS

机译:考虑多层电路板线图案的半导体结温度高精度热分析方法

获取原文

摘要

As multilayered circuit boards in which semiconductors are embedded have been well reported, thermal management is becoming quite an important issue. In order to predict the junction temperature of an embedded semiconductor precisely, it is necessary that line patterns should be taken into consideration for thermal fluid analysis. However modeling all the patterns correctly is unacceptable because of far too long calculation time. Thus only the ratio of a pattern area to a gross board area was considered, which caused up to 30% calculation error compared to the experimental results. We have developed a novel method to predict semiconductor junction temperatures precisely without modeling patterns themselves. Firstly boards are divided into multiple regions in order to express how much dense or coarse the patterns are. Since the size of each region is much larger than L/S (line and space) specification of the boards, the number of meshes for calculation does not increase explosively and the simulation can be finished within appropriate time. Secondly equivalent anisotropic thermal conductivity of each region is assigned as follows. All the regions are once divided into smaller subregions whose sizes are approximately L/S specification. Then thermal conductivity of each subregion is defined by the property of the material at the centered subregion. After that a thermal network composed of all the subregions is generated and anisotropic thermal conductivities of each divided region are computed by solving this thermal network matrix. This procedure should be executed in an electrical CAD (E-CAD) where line pattern data are stored. A new interface format using which we can transfer board data from E-CAD to thermal fluid simulator was prepared. This format can have not only layouts and sizes but also anisotropic thermal conductivities of all divided regions. There is no need either to prepare model geometries or to input attributes of a great number of divided regions on thermal fluid simulator. By way of this format, analytical models are imported in thermal fluid simulator and semiconductor junction temperatures are computed. It was confirmed that semiconductor junction temperatures calculated by this method were precisely coincident with the experimental results. We can predict semiconductor temperatures without making preproduction samples. This analysis methodology will highly contribute to the reduction of designing time and cost.
机译:作为在半导体嵌入已经被广泛报道多层电路板,热管理正成为一个相当重要的问题。为了预测精确地嵌入的半导体的结温度,这是必要的线图案应当考虑用于热流体分析。然而正确建模所有的模式是因为时间太长的计算时间是不可接受的。因此,只有被认为是一个图案区域的总的电路板面积的比率,这引起高达30%的计算误差相比的实验结果。我们已经开发出预测半导体结温不准确建模模式本身的新方法。首先板以表达多少致密或粗的图案分成多个区域。由于每个区域的尺寸比L / S(线和空间)板的规格大得多,网格进行计算的数量不增加爆炸和模拟可在适当的时间内完成。其次每个区域的等效各向异性的热导率如下分配。所有的区域被一次分割成更小的子区域其尺寸为约L / S规范。然后,每个子区域的热传导率是由材料在中心分区域的属性来定义。所生成后,所有的子区域构成的热网络,并且每个分割区域的各向异性的热导率是通过把该热网络矩阵计算。此过程应在电气CAD(E-CAD),其中线图案数据被存储被执行。制备使用,我们可以从E-CAD转移板数据到热流体仿真一个新的接口格式。这种格式可以不仅布局和大小,而且所有的分割区域的各向异性的热导率。没有必要要么准备模型的几何形状,或者输入属性上热流体仿真分割区域的大量的。通过此格式的方式,分析模型被导入热流体仿真器和半导体结的温度来计算。经证实,通过该方法计算出的半导体结的温度下与实验的结果准确地重合。我们可以预测半导体的温度不进行试生产的样品。这种分析方法将非常有助于设计时间和成本的降低。

著录项

相似文献

  • 外文文献
  • 中文文献
  • 专利
获取原文

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号