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DIE STRESS VARIATION DURING THERMAL CYCLING RELIABILITY TESTS

机译:热循环可靠性测试期间的模具应力变化

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Thermal cycling accelerated life testing is an established technique for thermo-mechanical evaluation and qualification of electronic packages. Finite element life predictions for thermal cycling configurations are challenging due to several reasons including the complicated temperature/time dependent constitutive relations and failure criteria needed for solders, encapsulants and their interfaces; aging/evolving material behavior for the packaging materials (e.g. solders); difficulties in modeling plating finishes; the complicated geometries of typical electronic assemblies; etc. In addition, in-situ measurements of stresses and strains in assemblies subjected to temperature cycling are difficult because of the extreme environmental conditions and the fact that the primary materials/interfaces of interest (e.g. solder joints, die device surface, wire bonds, etc.) are embedded within the assembly (not at the surface). For these reasons, little is known about the evolution of the stresses, strains, and deformations occurring within sophisticated electronic packaging geometries during thermal cycling. In this work, we have used test chips containing piezoresistive stress sensors to characterize the in-situ die surface stress during long-term thermal cycling of electronic packaging assemblies. Using (111) silicon test chips, the complete three-dimensional stress state (all 6 stress components) was measured at each rosette site by monitoring the resistance changes occurring in the sensors. The packaging configuration studied in this work was flip chip on laminate where 5 x 5 mm perimeter bumped die were assembled on FR-406 substrates. Three different thermal cycling temperature profiles were considered. In each case, the die stresses were initially measured at room temperature after packaging. The packaged assemblies were then subjected to thermal cycling and measurements were made either incrementally or continuously during the environmental exposures. In the incremental measurements, the packages were removed from the chamber after various durations of thermal cycling (e.g. 250, 500, 750, 1000 cycles, etc.), and the sensor resistances were measured at room temperature. In the continuous measurements, the sensor resistances at critical locations on the die device surface (e.g. die center and die corners) were recorded continuously during the thermal cycling exposure. From the resistance data, the stresses at each site were calculated and plotted versus time. The experimental observations show cycle-to-cycle evolution in the stress magnitudes due to material aging effects, stress relaxation and creep phenomena, and development of interfacial damage.
机译:热循环加速寿命测试是一种用于电子封装的热电机械评估和资格的既定技术。由于包括焊料,密封剂及其界面所需的复杂温度/时间依赖性本构关系和失效标准,有限元循环配置的有限元寿命预测是具有挑战性的。包装材料的老化/演化材料行为(例如焊料);涂布电镀饰面的困难;典型电子组件的复杂几何形状;另外,由于极端的环境条件以及感兴趣的主要材料/界面(例如焊接接头,模具装置表面,钢丝键,导线,导线,导线键,导线,导线,导线键,导线,所述焊接接头,模具装置,钢丝键,导线键,等)嵌入组件内(不在表面)内。由于这些原因,关于在热循环期间在复杂的电子包装几何形状内发生应力,菌株和变形的演变几乎是知之甚少。在这项工作中,我们使用了包含压阻应力传感器的测试芯片,以在电子包装组件的长期热循环期间表征原位模具表面应力。使用(111)硅测试芯片,通过监测传感器中发生的电阻变化,在每个莲座部位测量完整的三维应力状态(所有6个应力分量)。在该工作中研究的包装配置在层压板上的倒装芯片,其中5×5mm周边凸块模具组装在FR-406基板上。考虑了三种不同的热循环温度曲线。在每种情况下,在包装后最初在室温下测量芯片应力。然后将包装的组件进行热循环,在环境暴露期间逐步或连续进行测量。在增量测量中,在热循环的各种持续时间之后从腔室中除去包装(例如,250,500,750,1000个循环等),并且在室温下测量传感器电阻。在连续测量中,在热循环曝光期间连续地记录管芯装置表面上的关键位置处的传感器电阻(例如芯片中心和模拐角)。从抵抗数据,计算和绘制每个部位的应力与时间。实验观察结果显示由于材料老化效应,应力松弛和蠕变现象以及界面损伤的发展导致应力幅度的周期到循环的进化。

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