ASSEMBLY PROCESS CHARACTERIZATION AND FAILURE ANALYSIS OF FLIP CHIP ASSEMBLIES USING NO-FLOW UNDERFILL

摘要

The application of no-flow underfills for high I/O density, fine-pitch, flip chip in package (FCIP) applications is analyzed in this paper. The process design parameters for improved assembly yields depend strongly on the underfill material's characteristics and particularly the reflow profile. A number of commercially developed no-flow underfills are evaluated to determine the thermal material characteristics in terms of interconnect yield. Test vehicles used in this study incorporate high I/O density, large chip size, and small interconnect pitch. This paper presents a methodology for evaluating new commercial no-flow underfill materials, techniques for establishing baseline reflow profiles for yielding FCIP devices, initial yield sensitivity analysis, and initial void sensitivity analysis for the FCIP assembly process.