首页> 外文会议>Heat Transfer Conference >WAFER-LEVEL PACKAGING TECHNOLOGY WITH THROUGH-HOLE INTERCONNECTIONS IN SILICON SUBSTRATE
【24h】

WAFER-LEVEL PACKAGING TECHNOLOGY WITH THROUGH-HOLE INTERCONNECTIONS IN SILICON SUBSTRATE

机译:硅级包装技术,硅衬底具有通孔互连

获取原文

摘要

An advanced packaging technology with through-hole interconnections, which enables miniaturization and high-density packaging of electronic devices including MEMS devices and optical devices, has been developed. In this work, through-hole interconnections were applied to an image sensor packaging. Through-holes, 80μm in diameter and 200μm in depth, were formed from backside of the device wafer by Deep Reactive Ion Etching (DRIE). After an insulation layer was formed inside the holes, conductive material such as copper (Cu) or Gold-Tin (Au-Sn) alloy solder was filled into the holes by electroplating method or Molten Metal Suction Method (MMSM). This technology enables wafer-level packaging of the image sensor device. Some electrical characteristics and reliability performances including electric resistance, breakdown voltage, high-temperature storage test, heat cycle test, temperature-humidity test were examined. In this paper, fabrication processes, structural and electrical characteristics and reliability of the package will be reported.
机译:已经开发出一种具有通孔互连的先进的包装技术,其能够开发了包括MEMS器件和光学装置的电子设备的小型化和高密度包装。在这项工作中,通过孔互连应用于图像传感器封装。通过深反应离子蚀刻(Drie)由器件晶片的背面形成80μm的直径和200μm的深度。在在孔内形成绝缘层之后,通过电镀方法或熔融金属抽吸方法(MMSM)填充诸如铜(Cu)或金 - 锡(Au-Sn)合金焊料的导电材料。该技术使图像传感器装置的晶片级封装能够。检查了一些电气特性和可靠性性能,包括电阻,击穿电压,高温储存试验,热循环试验,温度湿度试验​​。在本文中,将报告包装的制造工艺,结构和电气特性和可靠性。

著录项

相似文献

  • 外文文献
  • 中文文献
  • 专利
获取原文

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号