System in a Package (SiP) Benefits and Technical Issues

摘要

The demand for integration of different functions into one unit with the smallest footprint, lowest cost and fastest time to market has fuelled the development of System-in-Package (SiP) solutions. The first SiP stacked Flash and SRAM die into a single CSP. Now applications require assembly of analog and digital designs with varied die sizes, pad pitch and performance requirements in progressively thinner packages. Current SiPs assemble 2-5 die in a single package combining wire bond with peripheral or center pads, die-to-die bonding, flip chip and SMT. They have dramatically increased silicon-to-package area ratio to more than 250% by using the current infrastructure with only marginal cost increments. Die stacking, thin die, thin and dense substrates, tailored materials, high yield assembly process and all that in a very thin package with very tight tolerances are some of the technical challenges. This paper reviews numerous SiP solutions, their benefits and some of the technical issues addressed during development to provide a reliable and cost effective SiP.