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Area array packages - materials requirements for diminishing devices

机译:区域阵列包装 - 递减设备的材料要求

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Continuously increasing proprtion of both consumer and professional electronic devices is portable enabling users to take advantage, for example, of e-mail or browse internet independently of their location. This requires high performance from the equipment that inevitably implies very high packaging efficiency; more functions and higher performance must be incorporated into an ever-smaller housing. Consequently, new packaging, substrate and interconnection technologies must be developed continuously.Area array packages, especially Chip Scale Package and Flip Chip, can provide close to ideal package size in relation to the integrated circuit size. It follows that also the dimensions of solder joints will be very small as compared to conventional surface mount technology, and thus much research and development work is ennded to overcome the challenges. In addition, printed wirin board design rules are shrinking to be able to perform effective routing for the new components. New manufacturing technologies and materials have to be developed parallel to the component and substrate technologies in order to ensure smooth and reliable assembly operations. This paper reviews challenges that the new technologies set on materials and presents some viable new solutions.
机译:不断增加消费者和专业电子设备的预订是便携式的,使用户能够利用例如电子邮件或独立于其位置的电子邮件或浏览互联网。这需要从设备不可避免地意味着非常高的包装效率的高性能;必须将更多功能和更高的性能结合在更小的外壳中。因此,必须连续开发新的包装,基板和互连技术。阵列阵列封装,尤其是芯片尺度封装和倒装芯片,可以靠近理想的封装尺寸,相对于集成电路尺寸。因此,与传统的表面安装技术相比,焊点的尺寸也将非常小,因此有很多研究和开发工作是为了克服挑战。此外,印刷的线材板设计规则正在缩小,以便能够对新组件进行有效的路由。必须与部件和基板技术平行开发新的制造技术和材料,以确保平稳可靠的装配操作。本文审查了挑战,即新技术在材料上设置并提出了一些可行的新解决方案。

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