INTEGRATED PREDEPOSITION CLEANING/PASSIVATION OF Si SURFACES FOR MOS DEVICES WITH SiO{sub}2/Si INTERFACES

摘要

A novel approach consisting of i) a low-temperature, 300-400°C, plasma-assisted oxidation to form the SiO{sub}2/Si interface, and ii) 800°C rapid thermal chemical vapor deposition, RTCVD, to deposit the bulk SiO{sub}2 film has been used to fabricate ultrathin gate-oxide heterostructures. This sequence separates SiO{sub}2/Si interface formation from the bulk oxide film formation. We have studied the chemistry of the interface formation process by Auger electron spectroscopy (AES) and the electrical properties of the SiO{sub}2/Si interface in device structures including MOS capacitors and FETs. The plasma-assisted oxidation pre-deposition treatment (i) removes residual carbon contamination from the Si surface, (ii) creates a ～0.6 nm SiO{sub}2 layer that establishes the crucial SiO{sub}2/Si interface and serves as a foundation for the subsequent rapid thermal CVD oxide, and (iii) forms a low D{sub}(it) SiO{sub}2/Si interface with peak channel mobilities, μ{sub}(eff), comparable to that of control thermal oxides formed with traditional high-temperature furnace oxidation.