Sub-micron, Metal Gate, High-κ Dielectric, Implant-free, Enhancement-mode III-V MOSFETs

摘要

The performance of 300nm, 500nm and lμm metal gate, implant free, enhancement mode III-V MOSFETs are reported. Devices are realised using a lOnm MBE grown Ga_2O_3/(Ga_xGd_(1-x))_2O_3 high-κ^s(κ=20) dielectric stack grown upon a δ-doped AIGaAs/InGaAs/AlGaAs/GaAs heterostructure. Enhancement mode operation is maintained across the three reported gate lengths with a reduction in threshold voltage from 0.26 V to 0.08 V as the gate dimension is reduced from 1 μm to 300 ran. An increase in transconductance is also observed with reduced gate dimension. Maximum drain current of 420 μA/jim and extrinsic transconductance of 400 μS/μm are obtained from these devices. Gate leakage current of less than lOOpA and subthreshold slope of 90 mV/decade were obtained for all gate lengths. These are believed to be the highest performance sub-micron enhancement mode III-V MOSFETs reported to date.