首页> 外文会议>International Symposium on High Dielectric Constant Gate Stacks >THERMAL ROBUSTNESS OF VFB AND EOT IN HfO,(N) P-MOS DEVICES WITH PARTIALLY SILICIDED Pt GATE ELECTRODES
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THERMAL ROBUSTNESS OF VFB AND EOT IN HfO,(N) P-MOS DEVICES WITH PARTIALLY SILICIDED Pt GATE ELECTRODES

机译:HFO,(n)P-MOS装置的VFB和EOT的热稳健性,具有部分硅化PT栅电极

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摘要

We investigated the process window of partially silicided (PASI) Pt gate electrodes which can effectively suppress unintentional threshold voltage increases of Hf-based high-k p-MOSFETs, and the impact of application of the PASI Pt (PASI-PtSi) gate electrode on their electrical properties. The values of the EOT, flat-band voltage, and the gate leakage current density of the HfO_x(N) p-MOS capacitors with the PASI-PtSi gate electrodes are almost identical when the Pt film is more than double the thickness of the poly-Si films at silicidation temperatures from 400 to 600°C. No degradation in the gate leakage current density of the HfO_x(N) MOS capacitors with the PASI-PtSi gate electrodes was observed, compared with the FUSI-NiSi and FUSI-PtSi gate electrodes. Consequently, it is concluded that the PASI technology is useful in scaled CMOS devices with Hf-based high-k dielectrics.
机译:我们研究了部分硅化(PASI)PT栅电极的过程窗口,其能够有效地抑制了基于HF的高k P-MOSFET的无意阈值电压,以及PASI PT(PASI-PTSI)栅电极的应用的影响他们的电气性质。当PT薄膜大于多加倍的PT膜时,EOT的EOT,平带电压和HFO_X(n)P-MOS电容器的栅极漏电流密度与PASI-PTSI栅极电极几乎相同-SI硅化薄膜从400到600°C的硅化温度。与Fusi-NISI和Fusi-PTSI栅电极相比,观察到具有PASI-PTSI栅电极的HFO_X(N)MOS电容器的栅极漏电流密度的差异。因此,得出结论,PASI技术在具有基于HF的高k电介质的缩放CMOS器件中是有用的。

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