Characterization of Charge Trapping and Dielectric Breakdown of HfAlOx/SiON Dielectric Gate Stack

摘要

We have studied the dielectric breakdown mechanism of metal/HfAlO,(Hf/(Al+H0~0.3)/SiON gate stack formed on p-Si(lOO) based on characterization of leakage current, charge trapping and time-dependent dielectric breakdown (TDDB) Weibull distribution. We found that, for capacitors with Al gate, the gate leakage for the dielectric stack with 3nm-thick HfAlO, at negative gate voltages higher than -2V is dominated by direct tunneling (DT) of electrons from the Al gate while the leakage current through the cases with 5nm and 7nm-thick HfAlOx is controlled by Frenkel-Poole (FP) emission in HfAlCv For capacitors with Au or Ni gate, hole current from the p-Si (100) substrate is likely to contribute significantly to the leakage current at a weak accumulation condition because the leakage current is enhanced markedly by cold light irradiation. The changes in leakage current and flat band shift during negative constant voltage stress (CVS) can be explained by both electron trapping near Al gate and hole trapping near the interface between HfAlOK and SiON. The enhanced electric field near the HfAlOx/SiON interface by charge trapping and resultant recombination of electrons and holes near the interface appear to trigger the soft-breakdown (SBD). The TDDB Weibull slope being independent on electrode work function, stress field and temperature during CVS increases with the HfAlOx thickness, which is associated with a percolation model for dielectric breakdown. Also, the Field acceleration factor for TDDB shows no significant temperature dependence for the 3nm-thick HfAlOx case where the DT current flows, but in contrast for the thicker case dominating by FP emission it decreases at temperatures above ~60°C. The results indicate that the leakage current induced charge trapping in the dielectric stack is a major factor to characterize the dielectric breakdown.