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CMP Technology for 32-45nm Node Cu/Low-k Integration

机译:CMP技术32-45NM节点CU / LOW-K集成

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The effect CMP pressure had on the via resistance yield of 2-level porous low-k/Cu damascene interconnects was investigated. This yield was found to strongly depend on both the CMP pressure and moduli of via low-k films. We found that high-modulus low-k films (9.8 GPa) and low-pressure CMP (< 1.5 psi) were essential for fabricating reliable low-k/Cu interconnects for the 45-nm technology node. We also investigated the dependence of ultra low-k (ULK, k= 1.6-1.8) film deiamination on the pattern during CMP for the 32-nm technology node. A CMP mask that had various kinds of dummy-patterns was developed to quantitatively characterize ULK film delamination. As a result, we found dummy pattern supported the poor mechanical strength of ULK films (modulus < 2 GPa) and obtained excellent electrical properties for Cu/ULK damascene interconnects on 300-mm wafers.
机译:研究了CMP压力对二级多孔低k / Cu镶嵌键合键合的通孔电阻产率进行了研究。发现该产量强烈取决于通过低k薄膜的CMP压力和模态。我们发现高模量低k薄膜(9.8GPa)和低压CMP(<1.5 psi)对于制造45-nm技术节点的可靠低k / cu互连是必不可少的。我们还在CMP对于32-NM技术节点期间调查了超低k(ULK,K = 1.6-1.8)胶片在图案上的依赖性。开发了一种具有各种虚拟图案的CMP掩模,以定量表征ULK薄膜分层。结果,我们发现虚拟图案支持ULK薄膜的机械强度差(模量<2GPa),并获得300mm晶片上的Cu / Ulk镶嵌型互连的优异电性能。

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