For higher density devices electric performances have been focused more than the others. In the case of metal sputtering process some of machine makes local asymmetric deposition across the wafer. In this study, a couple of overlay reading errors which comes from asymmetric metal deposition has been studied in terms of photo process. As a result, scaling error could be reduced down to a certain amount with the optimization of overlay reading marks. However it will not be cleared no matter what kinds of mark are used as long as overlay marks are asymmetry. A symmetric sputtering should be the only way to figure out this problem. In order to make total product, related processes have to be concerned as well.
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