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A Method to Enhance the Front-Side Lapping Process for Localisation of Sub-surface Defect for Advanced Packages

机译:一种增强前侧研磨过程,用于提升高级封装的子表面缺陷

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In the back-end assembly process, all of the packages will be tested prior to disposition to the customers in order to filter out any device with failure. For a reject unit with an unknown failure mechanism, it will be subjected to a comprehensive failure analysis (FA) to identify the root cause of the failure. Non-destructive verification, following by front-side decapsulation and internal physical inspection is the common way to visualise and identify the physical defect that usually causes the failure of a device during the back-end assembly process. For certain failures, visualization of the defect might not be straight forward after the decapsulation because the defect may be embedded or buried underneath a layer or wedge bond on the die. In this case, a more complicated FA analysis flow which comprises various precision techniques such as parallel lapping, hotspot localisation and focused-ion-beam (FIB) analyses will be needed to thin down the top layer/wedge bond for a precise localisation of the defect prior to precision analysis by FIB. However, the process to thin down the top layer/wedge bond with an exposed die of a partially decapsulated package is a tricky job as artefacts such as crack/scratches on die are likely to be introduced during the process of polishing. Also it is relatively difficult to control the thickness and levelling of the top layer/wedge bond during the thinning process. In this work, we developed a method that allows the analyst to re-cap the partially decapped package, and also to precisely measure and thin down the top layer to an accuracy of less than < 2μm without the introduction of artefacts.
机译:在后端组装过程中,所有包都将在配置到客户之前进行测试,以便过滤掉任何故障的设备。对于具有未知故障机制的拒绝单元,将进行全面的故障分析(FA)以确定故障的根本原因。非破坏性验证,由前侧解敷和内部物理检查是可视化和识别在后端组装过程中通常导致设备故障的物理缺陷的常用方法。对于某些故障,在解敷后,缺陷的可视化可能不会直截了当,因为缺陷可以嵌入或掩埋在模具上的层或楔形键处。在这种情况下,将需要一种更复杂的FA分析流,该流程包括各种精密技术,例如并联研磨,热点定位和聚焦 - 离子束(FIB)分析,以缩小顶层/楔形键,以获得精确的定位通过FIB精确分析之前的缺陷。然而,与部分解封的封装的暴露管芯薄的处理薄的过程是棘手的工作,因为在抛光过程中可能引入诸如芯片上的裂缝/划痕的伪像。在稀释过程中,控制顶层/楔形键的厚度和调平也相对困难。在这项工作中,我们开发了一种方法,允许分析师重新覆盖部分折叠的包装,并且还要精确地测量和薄于顶层以精度小于<2μm而不引入人工制品。

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