Modeling well edge proximity effect on highly-scaled MOSFETs

摘要

Well edge proximity effect caused by ion scattering during implantation in highly-scaled CMOS technology was explored from a process and physics point of view. TCAD simulation was employed to visualize the internal change of the MOSFETs. A new compact model for SPICE was proposed using physics-based understanding and was calibrated with experimental silicon test sets. Circuit simulation using the proposed model was conducted to evaluate the improvement in accuracy.