Fully dry-etched InP Double-Hetero Bipolar Transistors with f{sub}t > 400 GHz

摘要

Indium Phosphide-based Double-Heterostructure Bipolar Transistors have high potential for analog, digital, and mixed-signal applications requiring extreme clock speed and high voltage swing. To harness the full performance of the InGaAs/InP material system, the HBTs need to be scaled to submicron dimensions. Yield has always been an issue with wet-etch defined submicron InP HBTs. More complex circuits require homogeneous and reproducible processing techniques. We demonstrate a manufacturable InP HBT technology which relies on dry etching of all three semiconductor mesas (emitter, base, and subcollector), thus greatly improving control of critical dimensions and device parameters such as C{sub}(bc), Cbe, and collector current at which maximum f{sub}t and f{sub}(max) are attained. Further, we replaced the traditional emitter metal liftoff patterning process by dry-etched refractory metal. When scaling the emitter area, the emitter resistance increases inversely with the emitter size, requiring reduction of the specific emitter resistance. Dry etching of the emitter contact metal and the underlying semiconductor allows for a straight edge of the emitter contact, as opposed to wet etching: the crystallographic etching of InGaAs leaves a pyramidal shape, reducing the contact area, and inhibiting scaling of the emitter size. We achieved total emitter resistance as low as 5Ω for an emitter junction area of 0.5 × 4μm{sup}2 (extracted from S-parameter measurements).