A wide band and low PN PLL design for digital tuner

摘要

In order to realize a wide-band and low phase noise PLL for digital tuner, the desired tuning range of the PLL describes in this paper is divided into 8 sections according to different L/C tank circuits changed by channel selection, then a coarse-tuning loop is designed in the system to automatically select the suitable one of the 8 tuning curves which have overlapped part besides a fine-tuning loop that is the traditional PLL required, yielding design tradeoffs between output amplitude, power, locking time, and other factors.