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A WIDE BAND DIGITAL PHASE LOCKED LOOP (PLL) WITH A HALF-FREQUENCY OUTPUT
A WIDE BAND DIGITAL PHASE LOCKED LOOP (PLL) WITH A HALF-FREQUENCY OUTPUT
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机译:具有半频输出的宽带数字锁相环(PLL)
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摘要
A digital phase locked loop includes an automatic gain control that applies a gain to an input signal in order to provide a gain controlled signal, A 90° phase shifter applies a 90° phase shift to the gain controlled signal in order to provide a 90° phase shifted version of the gain controlled signal. A phase detector is driven by the gain controlled signal, by the 90° phase shifted version of the gain controlled signal, and by sinusoidal and co-sinusoidal signals. A loop filter integrates an output of the phase detector and provide servo equalization for the phase-locked loop. A digital dual frequency oscillator has a fundamental frequency controlled by an output signal from the loop filter. Also, the digital dual frequency oscillator generates the sinusoidal and co-sinusoidal signals.
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