The Effect of Via Patterning Scheme and Metal Hard-mask based All-in-one Etch on Contact Resistance of Cu/low-k Interconnects

摘要

The impact of via patterning scheme and all-in-one (AIO) etch on contact resistance (Rc) is extensively investigated in this contribution. The addressed tri-layer via patterning schemes consist of CVD-based approach Ⅰ and spin-on-based approach Ⅱ. The self-aligned via (SAV) etch method is considered and compared with punch-through (PT) method for the sake of via encroachment concern. Results show both etch methods could deliver the on-target Rc performance with approach Ⅰ if the overlay shift is strictly controlled and SAV is quite sensitive to overlay shift and could degrade the overall Re performance if coupled with approach Ⅱ. The importance of via circularity, trench-etch and post etch treatment (PET) also needs special attention. Besides, wet etch still plays a critical role in achieving the desired Rc. It's imperative to use the alternative wet method other than traditional dilute HF.