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Emitter-base short issue study and improvement in a low cost and high performance 0.18um SiGe BiCMOS process

机译:发射器基础短发行研究和改进低成本和高性能0.18um SiGe BICMOS工艺

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This paper studied the short issue of the emitter and the base, which is frequently found in the fabrication of the SiGe HBT devices. The physical failure analysis reveals that the main reason is the formation of cobalt silicide in the emitter poly-Si sidewall. Reducing the lower electrode voltage and source power of the main etch step can reduce the byproducts accumulation during etching and improve the emitter poly-Si profile. Adjusting the etch time ratio of main etch and soft landing makes the polysilicon angle improved from less 80° to 88° and eliminate the footing issue. It is found that the PECVD film has poor coverage, and that by LPTEOS shows better coverage. And by increasing the oxide film thickness from 80nm to 160nm, the width of emitter poly (EP) sidewall spacer after etching is 105nm. Before cobalt silicide formation, the sidewall spacer width is 63nm, which can play a role of a good protection layer for the emitter polysilicon and isolate the emitter from the base of the SiGe HBT.
机译:本文研究了发射器和基座的短缺,经常在SiGe HBT器件的制造中找到。物理失败分析表明,主要原因是发射极多Si侧壁中的硅化物的形成。减小主蚀刻步骤的较低电极电压和源功率可以减少蚀刻期间的副产物积累并改善发射器多Si型材。调整主蚀刻和软着陆的蚀刻时间比使多晶硅角度从较少的80°变为88°,并消除了基础问题。结果发现,PECVD薄膜的覆盖率差,LPTEOS的覆盖率较好地显示出更好的覆盖范围。并且通过将氧化物膜厚度从80nm增加到160nm,蚀刻后的发射器聚(EP)侧壁间隔物的宽度为105nm。在硅化物硅化物形成之前,侧壁间隔件宽度为63nm,其可以发挥发射器多晶硅的良好保护层的作用,并将发射器与SiGe HBT的底部分离。

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