【24h】

The low power design of 2D graphic engine based on the AMBA bus

机译:基于AMBA总线的2D图形引擎的低功耗设计

获取原文

摘要

This paper described the features and structure of the 2D graphic engine based on AMBA bus[1], and the 2D graphic engine is compartmentalized some function modules, and they are designed by VHDL. The RTL code of the 2D graphic engine[2–3] is simulated and synthesized successfully. At last, the RTL code of the 2D graphic engine is integrated into a chip of SoC, and the chip is taped out successfully.
机译:本文介绍了基于AMBA总线 [1] 的2D图形引擎的特征和结构,将2D图形引擎划分为一些功能模块,并由VHDL设计。二维图形引擎 [2–3] 的RTL代码已成功模拟并合成。最后,将2D图形引擎的RTL代码集成到SoC芯片中,并成功地将其粘贴到磁带中。

著录项

相似文献

  • 外文文献
  • 中文文献
  • 专利
获取原文

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号