首页> 外文会议>Electron Devices Meeting, 2003. IEDM '03 Technical Digest. IEEE International >Process roadmap and challenges for metal barriers copper interconnects
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Process roadmap and challenges for metal barriers copper interconnects

机译:金属阻挡层的工艺路线图和挑战铜互连

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Copper interconnects require two types of barrier layers: a liner on the sides and bottoms of the damascene features and a cap on top of the damascene features. The key functions of the barrier layers are to prevent copper and oxygen diffusion and promote adhesion with both the interlayer dielectric (ILD) and the copper. The cap layer must also protect the copper from corrosion during subsequent patterning steps and act as an etchstop for partially landed vias. Most copper damascene processes use a PVD Ta and/or Ta(N) alloy liner and PECVD SiN or SiCN dielectric cap. However, as copper interconnects continue to scale to finer dimensions these metal barrier technologies become problematic due to wiring resistance and current density issues. This paper describes some of the alternative liner and cap technologies that are being developed to address these issues.
机译:铜互连需要两种类型的势垒层:镶嵌特征的侧面和底部的衬里和镶嵌特征顶部的盖。阻挡层的关键功能是防止铜和氧扩散并促进与层间电介质(ILD)和铜的粘附。覆盖层还必须在后续的构图步骤中保护铜免受腐蚀,并充当部分登陆过孔的蚀刻停止层。大多数铜镶嵌工艺使用PVD Ta和/或Ta(N)合金衬里和PECVD SiN或SiCN电介质盖。然而,随着铜互连继续按比例缩小到更细的尺寸,这些金属阻挡层技术由于布线电阻和电流密度问题而变得成问题。本文介绍了为解决这些问题而开发的一些替代衬管和盖技术。

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