首页> 外文会议>Electron Devices Meeting, 2000. IEDM Technical Digest. International >Process design methodology for via-shape-controlled, copper dual-damascene interconnects in low-k organic film
【24h】

Process design methodology for via-shape-controlled, copper dual-damascene interconnects in low-k organic film

机译:低k有机膜中通孔形状受控的铜双大马士革互连的工艺设计方法

获取原文

摘要

By dual hard mask (dHM) process combined with sidewall-hardening etching step, copper dual-damascene (DD) interconnects are fabricated in low-k organic film without any etch-stop layers under the trench. Careful designs of dHM structures and their patterning sequence enable us to harden the via-sidewall by fluorocarbon plasma, which is a key to reduce final via-shoulder loss at the via/trench connecting region. The low-k structure has low via resistance such as 0.65 /spl Omega//0.28 /spl mu/m/sup /spl phi//-via while keeping the large tolerance of misalignment in via/trench, appreciable for 0.1 /spl mu/m-generation CMOS ULSIs.
机译:通过双硬掩模(dHM)工艺与侧壁硬化蚀刻步骤相结合,可以在低k有机膜中制造铜双大马士革(DD)互连,而沟槽下方没有任何蚀刻停止层。精心设计的dHM结构及其构图顺序使我们能够通过碳氟化合物等离子体硬化通孔侧壁,这是减少通孔/沟槽连接区域最终通孔肩部损耗的关键。低k结构的通孔电阻低,例如0.65 / splΩ// 0.28 / spl mu / m / sup / spl phi //-via,同时保持过孔/沟槽的未对准误差较大,对于0.1 / spl mu而言可观/ m代CMOS ULSI。

著录项

相似文献

  • 外文文献
  • 中文文献
  • 专利
获取原文

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号