METHOD FOR DUAL-DAMASCENE PATTERNING OF LOW-K INTERCONNECTS USING SPIN-ON DISTRIBUTED HARDMASK

摘要

PURPOSE: A method for forming a patterned interconnect structure is provided to fabricate a copper interconnect structure including a low-k dielectric by fabricating the low-k dielectric and the hard mask(a polishing stop layer and a patterning layer) while using only one tool. CONSTITUTION: Spin-on materials are used as the hard mask. The use of spin-on materials for the hard mask ensures that the process is carried out in a single tool and a single curing step which is not typically employed in prior art patterning processes employing chemical vapor deposition(CVD) hard masks is used. The effective dielectric constant of the resultant structure is not significantly increased since the use of spin coating allows for selection of a polish stop layer such that the polishing stop layer has substantially the same dielectric constant as the underlying dielectric. The hard mask includes at least two spin-on dielectric materials that have different etch rates.