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Electrical characterization of CdS passivation on InP

机译:InP上CdS钝化的电学表征

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InP surface passivation has been realized by a convenient chemical bath deposition (CBD) of a thin CdS layer. For comparison, samples without any treatment and with only a thin SiO/sub 2/ layer were also prepared. Also studied was the effect of a thin layer of SiO/sub 2/ deposited immediately after the CdS deposition. Schottky contacts were made on the CdS-passivated InP by electron-beam deposition of Ti/Au. Electrical characterization was conducted by current-voltage (I-V) measurements. It was found that the electrical performance of the Schottky contacts of the CdS-passivated samples was improved significantly. The thickness (deposition time) of the CdS strongly affects the device electrical performance. The additional SiO/sub 2/-on-CdS layer plays a key role in the process of InP surface passivation. Post-treatment in the CdS deposition process also significantly improves the surface morphology and electrical properties.
机译:InP表面钝化通过薄CdS层的便捷化学浴沉积(CBD)实现。为了进行比较,还制备了未经任何处理且仅具有薄的SiO / sub 2 /层的样品。还研究了CdS沉积后立即沉积的SiO / sub 2 /薄层的影响。通过Ti / Au的电子束沉积在CdS钝化的InP上进行了肖特基接触。通过电流-电压(I-V)测量进行电表征。发现钝化CdS的样品的肖特基触头的电性能得到了显着改善。 CdS的厚度(沉积时间)会严重影响器件的电气性能。额外的SiO / sub 2 / -on-CdS层在InP表面钝化过程中起关键作用。 CdS沉积过程中的后处理还可以显着改善表面形态和电性能。

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