Fabrication method for IC-oriented Si twin island single electron transistors

摘要

A new fabrication method for Si single-electron transistors (SETs) is proposed. The method enables us to fabricate, in a self-aligned way, a twin-island SET in which two Si islands are aligned in parallel. Experimental devices demonstrated, at 40 K, that the twin-island SET structure can be operated as two individual SETs. Since the two SETs are packed in a tiny area, this method is suitable for constructing logic circuits based on pass-transistor-type logic and CMOS-type logic, which promises to lead to single-electron logic LSIs.