Solder bump flip chip technology is particularly well suited to the packaging of classes of devices, such as fine pitch LED (light emitting diode) array electrophotographic print heads, which place premiums on precision alignment, high electric interconnect density, close die placement, and low cost. The manufacturing feasibility of such an array was investigated, with particular emphasis on the quality of surface tension induced self-alignment associated with solder bump bonding. An array of LED diode array chips was fabricated employing 75 mu -dia. solder bumps on 156 mu m pitch. The chips were spaced 15 mu edge-to-edge, face down, on a glass substrate patterned with thin film metallization. Chip-to-substrate alignment errors in the X-Y plane were found to be under 1.5 mu m with a standard deviation of under 1.0 mu m, well below the 10-15 mu m error typical of the standard mechanical alignment method. Improvements in light output uniformity and a reduction in scattered light over arrays manufactured with conventional die placement and wire bonding were also observed.
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