Highly Integrated Assembly Processes Solutions for Double-Sided-SiP Package

摘要

5G era is coming, mobile devices with high performance and high duration ability have been common requirement in recent years. By shrinking PCB size to enlarge battery size seems like a simple way. However, there will be more and more components integrated into a smartphone devices so IC packaging would require the feature of small form factor with integrating inductors, capacitors and resistors into a single module. Today, an emerging 3D packaging solution aka Double-Sided-SiP could offer higher integration ability as well as addressing space limitation.In this paper, a double side molding process will be used forming the Double-Sided-SiP structure which integrates lots passive components on the top side of Double-Sided-SiP are assembled by SMT, and SoC die on the bottom side is surrounded by BGA ball and epoxy molding compound. This kind of packaging platforms are able to shrink overall package size around 35%. However, to provide sufficient related current and voltage usually use bulky passives for this kind of applications. It means that top mold must be tall enough to accommodate the bulky passives. With overall package height constraints, an extremely unbalanced mold ratio between top mold and bottom mold is expected to cause worse warpage performance. Another major challenge is to make BGA ball solder protrusion for sufficient stand of height proceeding to SMT assembly process.In this study theme, warpage simulation for strip form and package unit form will be implemented for epoxy molding compound selection. Afterward, using DOE (Design of Experiment) study to verify warpage performance post molding will be implemented. Another DOE study to find out proper laser ablation process parameter will be performed to reach designate BGA ball solder protrusion as well. In addition, a series typical reliability testing, including TCT(Temperature Cycle Test), HTST(High Temperature Storage Test), un-bias HAST are eventually carried out as verification of the Double-Sided-SiP structure.