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Electrical Characterization of High Performance Fine Pitch Interconnects in Silicon-Interconnect Fabric

机译:硅互连结构中高性能细间距互连的电气特性

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The Silicon-Interconnect Fabric (Si-IF) is a highly scalable platform for heterogenous integration of dielets using a fine interconnect pitch (≤ 10 μm) and small inter-dielet spacing (≤ 100 μm) [1]. In our fine-pitch integration scheme, short links on Si-IF (≤ 500 μm) are used for inter-dielet communication, reducing the latency (≤ 35 ps) and energy/bit (≤ 0.04 pJ/b) [2]. In this paper, we demonstrate the excellent transfer characteristics of the Si-IF links, verified experimentally. The measured insertion loss in these short SiIF links (≤ 500 μm) is ≤ 2 dB for frequencies up to 30 GHz. Further, the transfer characteristics show only a single pole, demonstrating an RC-link behavior. We show that assemblies on Si-IF have 16-25X lower parasitic inductance, and 6-40X lower parasitic capacitance compared to assemblies on interposers and PCBs. We illustrate that using the Simple Universal Parallel intERface for chips (SuperCHIPS) protocol [2] for data transfer, data rates of ≥10 Gbps/link are realizable at an energy/bit of ≤ 0.04 pJ/b. Subsequently, due to the high interconnect density, the overall bandwidth/mm is ≥ 8 Tbps/mm. This corresponds to an improvement of 120-300X in bandwidth/mm and a reduction of 100-500X in energy/bit compared to a conventional PCB-based integration.
机译:硅互连结构(Si-IF)是一个高度可扩展的平台,可使用精细的互连间距(≤10μm)和较小的晶粒间间距(≤100μm)来实现小片的异构集成[1]。在我们的细间距集成方案中,Si-IF(≤500μm)上的短链路用于芯片间通信,从而减少了等待时间(≤35 ps)和能量/位(≤0.04 pJ / b)[2]。在本文中,我们演示了Si-IF链接的出色传输特性,并进行了实验验证。在高达30 GHz的频率下,在这些短SiIF链路(≤500μm)中测得的插入损耗为≤2 dB。此外,传输特性仅显示一个极点,表明RC链接行为。我们显示,与中介层和PCB上的组件相比,Si-IF上的组件的寄生电感低16-25倍,寄生电容低6-40倍。我们说明,使用芯片通用通用并行接口(SuperCHIPS)协议[2]进行数据传输,可以在能量/位≤0.04 pJ / b的情况下实现≥10 Gbps /链路的数据速率。随后,由于高互连密度,总带宽/ mm≥8 Tbps / mm。与传统的基于PCB的集成相比,这相当于带宽/ mm提高了120-300X,能量/位降低了100-500X。

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