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Development of cost effective Copper overburden removal for Via-Last TSV fabrication

机译:开发用于Via-Last TSV制造的经济有效的覆铜层

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Through Silicon Via (TSV) is a high performance interconnect technique to enable 3D packaging. Compared to conventional 2D packaging using wire bonding or flip chip bonding, the length of the connections are shorter thus the interconnect and device density become higher. In this paper, we explored how combination of wet etch and Cu CMP can improve microscopic flatness for overburden removal after TSV Cu filling, while keeping the process cost low for Via-Last TSV fabrication.
机译:硅穿孔(TSV)是一种高性能互连技术,可实现3D封装。与使用引线键合或倒装芯片键合的常规2D封装相比,连接的长度更短,因此互连和设备密度变得更高。在本文中,我们探索了湿法蚀刻和Cu CMP的组合如何在TSV铜填充后如何改善微观平整度以去除覆盖层,同时又保持了Via-Last TSV制造工艺的低成本。

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