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Measurement of SRAM power-up state for PUF applications using an addressable SRAM cell array test structure

机译:使用可寻址SRAM单元阵列测试结构测量PUF应用的SRAM上电状态

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摘要

SRAM data just after power-up were measured using an addressable SRAM cell array test structure. It was found that the results are strongly affected by the address switching noise and ???memory effect???. An addressing sequence combined with word line reset pulse application is proposed for reliable power-up data stability evaluation.
机译:使用可寻址SRAM单元阵列测试结构测量刚加电后的SRAM数据。已经发现,结果受到地址切换噪声和“存储器效应”的强烈影响。提出了结合字线复位脉冲施加的寻址序列,以进行可靠的上电数据稳定性评估。

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