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Common-floating gate test structure for separation of cycling-induced degradation components in split-gate flash memory cells

机译:共浮栅测试结构,用于分离分裂栅闪存单元中循环诱发的降解成分

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The program-erase cycling-induced degradation mechanisms in a split-gate SuperFlash® memory cell were analyzed using a test structure containing two cells with a common floating gate. This test structure allowed us to separate the degradation mechanisms taking place in the floating-gate oxide and tunnel oxide during cycling. It was demonstrated that the program-induced floating gate oxide degradation becomes less significant for the advanced SuperFlash technology, which uses lower programming voltage.
机译:使用包含两个具有公共浮栅的单元的测试结构分析了分裂栅SuperFlash ®存储器单元中程序擦除循环诱导的降解机理。这种测试结构使我们能够分离出循环过程中在浮栅氧化物和隧道氧化物中发生的降解机理。事实证明,对于采用较低编程电压的高级SuperFlash技术而言,编程引起的浮栅氧化物退化变得不那么明显。

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