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Embedded equalization for ADC-based serial I/O receivers

机译:基于ADC的串行I / O接收器的嵌入式均衡

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摘要

In this paper, the performance impact of embedding partial equalization in ADC-based receivers is analyzed. A hybrid ADC receiver architecture which includes embedded equalization and selective digital equalization power-down based on threshold detection is proposed.
机译:本文分析了嵌入基于ADC的接收器中嵌入部分均衡的性能影响。包括基于阈值检测的包括基于阈值检测的嵌入式均衡和选择性数字均衡断电的混合ADC接收器架构。

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