首页> 外文会议>International Conference on Electronic Packaging Technology >The Modeling of DC Current Crowding for Through-silicon Via in 3-D IC
【24h】

The Modeling of DC Current Crowding for Through-silicon Via in 3-D IC

机译:3-D IC中通过硅的DC电流拥挤的建模

获取原文

摘要

With increased current density induced by current crowding in Through-silicon Via(TSV), the reliability problem of interconnection of 3-D IC power grid, especially the electromigration (EM), cannot be ignored. To ensure the EM current limit is not exceed and the reliability of power delivery network of 3-D IC is stable, it is essential to accurately analyze the current crowding effect of TSV before manufacturing . So in this paper, a two dimensional analytical method for DC current crowding of 3-D interconnection, which includes TSV and bump, is proposed based on Laplace equation firstly. Then, the proposed method is validated by simulation tool, and a good correlation is obtained between proposed method and simulation result. With the proposed current crowding model, the distribution of voltage and current density can be characterized in two dimensions. Based on the proposed method, some instructive physical design rules of power/ground TSV can be obtained, which is beneficial for the optimization of PDN design and the relief of EM problem induced by current crowding effect.
机译:随着通过硅通孔通孔(TSV)的电流拥挤引起的电流密度增加,3-D IC电网互连的可靠性问题,尤其是电迁移(EM),不能忽略。为了确保EM电流限制不超过,3-D IC的电力输送网络的可靠性是稳定的,必须准确地分析制造前TSV的当前拥挤效应。因此,基于Laplace方程,提出了一种基于LAPLACE方程,提出了一种基于LAPLACE方程的三维电流拥挤的二维分析方法,包括TSV和凸块。然后,通过仿真工具验证所提出的方法,并且在所提出的方法和仿真结果之间获得了良好的相关性。利用所提出的当前拥挤模型,电压和电流密度的分布可以在两个维度中表征。基于所提出的方法,可以获得一些功率/地面TSV的有义物理设计规则,这对于优化PDN设计以及当前拥挤效应引起的EM问题的浮雕是有益的。

著录项

相似文献

  • 外文文献
  • 中文文献
  • 专利
获取原文

客服邮箱:kefu@zhangqiaokeyan.com

京公网安备:11010802029741号 ICP备案号:京ICP备15016152号-6 六维联合信息科技 (北京) 有限公司©版权所有
  • 客服微信

  • 服务号