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Study on Reliability Assessment of Wafer Level Package Using Design-on-Simulation with Support Vector Regression Techniques

机译:使用支持向量回归技术使用设计的仿真仿真性能对晶圆级封装的可靠性评估研究

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With the rapid development of technologies, electronic devices are asked to be thinner, lighter, and more powerful to meet market demands. Apart from developing the IC design technologies, advanced packaging technologies are also crucial elements for accomplishing the goal described previously. The reliability of the packaging structure is the most effective factor that ensures the functionality of packaged ICs. Thermal cyclic test (TCT) is one of the important experimental approaches to obtain the reliability of the electronic packages. The drawback of the experimental approach is taking a great amount of time and cost to obtain the result. Thus, the finite element analysis (FEA) is introduced to the industry to reduce the number of experiments, that is, we can save the time and cost from experiments. Due to the great enhancement of the computer infrastructures that provide high-performance computation and the great amount of storage, machine learning techniques become realized, applying in many different research topics including the assessment of the electronic package reliability.The purpose of this study is to apply support vector regression (SVR) techniques to predict the reliability of wafer level chip scale package (WLCSP), then to provide an efficient and effective way for the front-end designers to check the feasibility of their design. After we construct the SVR model, we can further save the time and cost from FEA simulations.In order to accomplish the research goal, this study will be accomplished according to the following three steps: first, the WLCSP reliability obtained by using FEA will be validated by the reference experimental resu second, the validated FEA result will be served as training data and testing data, and adopt SVR techniques to train the predictive model; third, the predictive performance of the predictive model obtained by using SVR techniques will be evaluated.The predictive models obtained by using SVR techniques show good agreement with the FEA results. The predictive performance can be improved by increasing the number of training data. As the number of training data increases, the difference between SVR model and FEA result would decrease, but the time used to train SVR model would increase. In this study, we would discuss the relation between the number of training data, SVR model performance, and training time of SVR model.
机译:随着技术的快速发展,被要求提供电子设备更薄,更轻,更强大,以满足市场需求。除了开发IC设计技术外,先进的包装技术也是实现先前描述的目标的重要元素。包装结构的可靠性是最有效的因素,可确保打包IC的功能。热循环测试(TCT)是获得电子包装可靠性的重要实验方法之一。实验方法的缺点是获得大量时间和成本来获得结果。因此,将有限元分析(FEA)引入行业以减少实验的数量,即我们可以节省实验的时间和成本。由于提供了高性能计算和大量存储量的计算机基础设施的巨大增强,机器学习技术实现了实现,在许多不同的研究主题中应用,包括评估电子包可靠性。本研究的目的是应用支持向量回归(SVR)技术来预测晶圆级芯片刻度封装(WLCSP)的可靠性,然后为前端设计人员提供高效且有效的方式检查其设计的可行性。在我们构建SVR模型之后,我们可以进一步节省FEA模拟的时间和成本。为了完成研究目标,本研究将根据以下三个步骤完成:首先,使用FEA获得的WLCSP可靠性将是通过参考实验结果验证;其次,经过验证的FEA结果将作为培训数据和测试数据,采用SVR技术来培训预测模型;第三,将评估通过使用SVR技术获得的预测模型的预测性能。通过使用SVR技术获得的预测模型与FEA结果显示了良好的一致性。通过增加训练数据的数量,可以提高预测性能。随着训练数据的数量增加,SVR模型和FEA结果之间的差异会降低,但训练SVR模型的时间将增加。在这项研究中,我们将讨论SVR模型的培训数据,SVR模型性能和培训时间之间的关系。

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