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Electrical Performances of a Mounted Chip in a Plastic Package

机译:塑料封装中已安装芯片的电气性能

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An electrical modelling concept for high speed packages (f≪5 GHz) is proposed. Using an equivalent circuit of an assembled SO8 package, electrical performances are simulated. It is shown that the inductive path between the gound plane of the die and the main ground plane constitute a severe limitation at high frequency. Our modelling concept is applicable to any single chip package.
机译:提出了用于高速封装(f≪5 GHz)的电气建模概念。使用组装好的SO8封装的等效电路,可以模拟电性能。结果表明,在高频下,芯片的圆角平面与主接地平面之间的感应路径构成了严重的限制。我们的建模概念适用于任何单芯片封装。

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