Failure mechanism of smaller substrate bond pad size in flip chip technology

摘要

The solution to the increasing demands for miniaturisation could be accomplished through flip chip interconnection technology. It is known that substrate solder resist opening is one of the key designs that govern a product size to increase I/O density. With the reduction of its size, it posed chip joint necking reliability issues. Interaction of substrate solder volume (package), package and die bump void (silicon/chip) was identified as the cause of this issue. The solution for this issue is critical in supporting future product trends of demanding high I/O density design.