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On synthesizing high speed sigma-delta DACs by combining the outputs of multiple low speed sigma-delta DACs

机译:通过组合多个低速sigma-delta DAC的输出来合成高速sigma-delta DAC

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The analog to digital converter (ADC) has received the lion's share of attention in the DSP based radio community because most radios are in fact radio receivers. We see, for example, how receive-only satellite, cable, and television receivers dominate the consumer market. Consequently, the spurious free dynamic range (SFDR) performance of a digital to analog converter (DAC) lags behind that of an ADC with comparable conversion rate and bit width. There is high interest in wide dynamic range, high-speed DACs for use in various two-way communication systems. We present a technique to combine the analog outputs from two or more DACs operating at reduced conversion rate to synthesize a composite DAC operating at a higher conversion rate.
机译:模拟到数字转换器(ADC)在基于DSP的无线电社区中获得了狮子的关注份额,因为大多数无线电实际上是无线电接收器。例如,我们看到,无接受卫星,电缆和电视接收者的主导地位消费市场。因此,数字到模拟转换器(DAC)的虚假自由动态范围(SFDR)性能具有相当的转换速率和比特宽度的ADC的滞后。对于各种双向通信系统的高速DAC,高速DAC具有高兴趣。我们提出了一种技术,将模拟输出与在减少的转换速率下操作的两种或更多种DAC组合,以合成以更高的转换速率操作的复合DAC。

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