Vertical NPN bipolar junction transistors fabricated in silicon-on-sapphire

摘要

Vertical NPN bipolar junction transistors were fabricated on DSPE (double solid-phase epitaxy) improved SOS (silicon-on-sapphire) using conventional furnace anneals. Transistors with an effective emitter area of 40 square microns were measured for current gain ( beta /sub DC/) and Early voltage (V/sub A/). Functional devices with beta /sub DC/ values of up to 70, V/sub A/ values of 40 volts, and f/sub T/ values of 1 gigahertz were recorded. A thin SOS film (0.27 micron) was regrown with DSPE process to reduce the microtwin defect concentration. A common emitter characteristic curve for a BJT (bipolar junction transistor) fabricated in DSPE improved SOS is shown. It can be seen from this sample that the effects of enhanced diffusion along dislocations causing emitter-collector shorts are minimized by utilizing the DSPE process prior to epitaxy deposition.