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Threshold voltage instability at low temperatures in partially depleted thin film SOI MOSFETs

机译:部分耗尽的薄膜SOI MOSFET在低温下的阈值电压不稳定性

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The threshold voltage instability at low temperatures due to the floating Si film in partially depleted SIMOX was examined at low temperatures under normal operating conditions. Floating-film SOI MOS transistors suffer an accumulation of holes generated by impact ionization near the drain, at the lower Si film interface. As the potential at this interface increases due to hole accumulation, the source junction becomes forward biased, limiting the amount of charge which can accumulate. This causes the saturation kink effect. The increase in potential at the lower interface acts analogously to a positive bias in bulk devices and effectively decreases the threshold voltage of the device. The use of the channel contact alleviates the hole accumulation effect by providing a conducting path for the generated holes. Hence, the grounded film exhibits a higher threshold voltage than the floating film.
机译:在正常工作条件下,在低温下检查了由于部分耗尽的SIMOX中的浮动Si膜而导致的低温下的阈值电压不稳定性。浮膜SOI MOS晶体管在较低的Si膜界面处因漏极附近的碰撞电离而产生空穴积累。由于空穴的积累,该界面处的电势增加时,源结变得正向偏置,从而限制了可以累积的电荷量。这引起饱和扭结效应。下界面处电势的增加类似于批量设备中的正偏压,并有效地降低了设备的阈值电压。通道接触的使用通过为所产生的空穴提供导电路径来减轻空穴累积效应。因此,接地膜表现出比浮膜更高的阈值电压。

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